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HP OpenVMS SystemsC++ Programming Language |
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HP C++
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This appendix describes the built-in functions available when you compile on OpenVMS systems. These functions allow you to access hardware and machine instructions directly.
These functions allow you to directly access hardware and machine instructions to perform operations that are cumbersome, slow, or impossible in other C++ compilers.
These functions are very efficient because they are built into the HP C++ compiler. This means that a call to one of these functions does not result in a reference to a function in the HP C Run-Time Library or to a function in your program. Instead, the compiler generates the machine instructions necessary to carry out the function directly at the call site. Because most of these built-in functions closely correspond to single Alpha or Itanium machine instructions, the result is small, fast code.
Be sure to include the <builtins.h> header file in your source program to access these built-in functions. Definitions for return types int64 and uint64 are contained in the header file <ints.h> .
Some of the built-in functions have optional arguments or allow a particular argument to have one of many different types. To describe all valid combinations of arguments, the following built-in function descriptions list several different prototypes for the function. As long as a call to a built-in function matches one of the prototypes listed, the call is valid. Furthermore, any valid call to a built-in function behaves as if the corresponding prototype were in scope of the call. The compiler, therefore, performs the argument checking and conversions specified by that prototype.
The majority of the built-in functions are named after the processor instruction that they generate. The built-in functions provide direct and unencumbered access to those processor instructions. Any inherent limitations to those instructions are limitations to the built-in functions as well. For instance, the MOVC3 instruction and the _MOVC3 built-in function can move at most 65,535 characters.
For more information on the Alpha built-in functions, see the corresponding machine instructions in the Alpha Architecture Handbook or Alpha Architecture Reference Manual.
For more information on the I64 built-in functions, see the corresponding machine instructions in the Intel® Itanium® Architecture Software Developer's Manual.
The following sections describe the HP C++ built-in functions available on OpenVMS Alpha systems.
HP C++ for OpenVMS Alpha systems does not support the built-in functions available with HP C++ for OpenVMS VAX systems. However, the <builtins.h> header file contains macro definitions that translate some VAX C built-in functions to the equivalent HP C++ for OpenVMS Alpha built-in functions. Consequently, the following VAX C built-in functions are effectively supported:
_BBCCI(position, address) _BBSSI(position, address) _INSQHI(new_entry, head) _INSQTI(new_entry, head) _INSQUE(new_entry, predecessor) _REMQHI(head, removed_entry) _REMQTI(head, removed_entry) _REMQUE(entry, removed_entry) _PROBER(mode, length, address) _PROBEW(mode, length, address) |
For more detail on any of these functions, see <builtins.h> or the description of the corresponding native Alpha function in this chapter. For example, for a description of _INSQHI, see __PAL_INSQHIL.
HP C++ on Alpha systems supports in-line assembly code, commonly called ASMs on UNIX platforms.
Like built-in functions, ASMs are implemented with a function-call syntax. But unlike built-in functions, to use ASMs you must include the <c_asm.h> header file containing prototypes for the three types of ASMs, and the #pragma intrinsic preprocessor directive.
Syntax:
__int64 asm(const char *, ...); /* for integer operations,
like mulq */
float fasm(const char *, ...); /* for single precision float
instructions */
double dasm(const char *, ...); /* for double precision float
instructions */
#pragma intrinsic (asm)
#pragma intrinsic (fasm)
#pragma intrinsic (dasm)
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The first argument to the asm, fasm, or dasm function contains the instruction(s) to be generated inline and the metalanguage that describes the interpretation of the arguments.
The remaining arguments (if any) are the source and destination arguments for the instruction being generated.
The following Privileged Architecture Library Code (PALcode) instructions are available as built-in functions:
__PAL_GENTRAP __PAL_INSQHIL __PAL_REMQHIL __PAL_MTPR_ASTEN __PAL_MFPR_ASTEN __PAL_HALT __PAL_INSQTIL __PAL_REMQTIL __PAL_MTPR_ASTSR __PAL_MFPR_ASTSR __PAL_PROBER __PAL_INSQUEL __PAL_REMQUEL __PAL_MTPR_DATFX __PAL_MFPR_ESP __PAL_PROBEW __PAL_INSQHIQ __PAL_REMQHIQ __PAL_MTPR_ESP __PAL_MFPR_FEN __PAL_CHME __PAL_INSQTIQ __PAL_REMQTIQ __PAL_MTPR_FEN __PAL_MFPR_IPL __PAL_CHMK __PAL_INSQUEQ __PAL_REMQUEQ __PAL_MTPR_IPIR __PAL_MFPR_MCES __PAL_CHMS __PAL_INSQUEL_D __PAL_REMQUEL_D __PAL_MTPR_IPL __PAL_MFPR_PCBB __PAL_CHMU __PAL_INSQUEQ_D __PAL_REMQUEQ_D __PAL_MTPR_MCES __PAL_MFPR_PRBR __PAL_LDQP __PAL_INSQHILR __PAL_REMQHILR __PAL_MTPR_PRBR __PAL_MFPR_PTBR __PAL_STQP __PAL_INSQTILR __PAL_REMQTILR __PAL_MTPR_SCBB __PAL_MFPR_SCBB __PAL_BPT __PAL_INSQHIQR __PAL_REMQHIQR __PAL_MTPR_SIRR __PAL_MFPR_SISR __PAL_BUGCHK __PAL_INSQTIQR __PAL_REMQTIQR __PAL_MTPR_SSP __PAL_MFPR_SSP __PAL_CFLUSH __PAL_MTPR_TBIA __PAL_MFPR_TBCHK __PAL_DRAINA __PAL_MTPR_TBIAP __PAL_MFPR_USP __PAL_RD_PS __PAL_MTPR_TBIS __PAL_MFPR_VPTB __PAL_SWPCTX __PAL_MTPR_TBISD __PAL_MFPR_WHAMI __PAL_SWASTEN __PAL_MTPR_TBISI __PAL_WR_PS_SW __PAL_MTPR_USP __PAL_IMB __PAL_MTPR_VPTB |
The following sections describe these PALcodes.
This function is provided for program debugging. It generates a Breakpoint trap.
This function has the following format:
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void __PAL_BPT (void); |
This function is provided for error reporting. It generates a Bug-check trap.
This function has the following format:
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void __PAL_BUGCHK (unsigned __int64 code); |
This function flushes at least the entire physical page specified by the page frame number value from any data caches associated with the current processor. After a CFLUSH is done, the first subsequent load on the same processor to an arbitrary address in the target page is fetched from physical memory.
This function has the following format:
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void __PAL_CFLUSH (int value); |
value
A page frame number.
This function allows a process to change its mode to Executive in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 to R7, PS, and PC are pushed onto the selected stack. The saved PC addresses the instruction following the CHME instruction.
This function has the following format:
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void __PAL_CHME (void); |
This function allows a process to change its mode to kernel in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 to R7, PS, and PC are pushed onto the kernel stack. The saved PC addresses the instruction following the CHMK instruction.
This function has the following format:
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void __PAL_CHMK (void); |
This function allows a process to change its mode to Supervisor in a controlled manner. The change in mode also results in a change of stack pointers: the old pointer is saved and the new pointer is loaded. Registers R2 to R7, PS, and PC are pushed onto the selected stack. The saved PC addresses the instruction following the CHMS instruction.
This function has the following format:
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void __PAL_CHMS (void); |
This function allows a process to call a routine using the change mode mechanism. Registers R2 to R7, PS, and PC are pushed onto the current stack. The saved PC addresses the instruction following the CHMU instruction.
This function has the following format:
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void __PAL_CHMU (void); |
This function stalls instruction issuing until all prior instructions are guaranteed to complete without incurring aborts.
This function has the following format:
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void __PAL_DRAINA (void); |
This function is used for reporting run-time software conditions. It generates a Software trap.
This function has the following format:
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void __PAL_GENTRAP (uunsigned __int64 encoded_software_trap); |
encoded_software_trap
The particular software condition that has occurred.
This function halts the processor when executed by a process running in kernel mode. This is a privileged function.
This function has the following format:
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void __PAL_HALT (void); |
This function makes the instruction stream coherent with the data stream. It must be executed after software or I/O devices write into the instruction stream or modify the instruction stream virtual address mapping, and before the new value is fetched as an instruction. Note that executing an IMB on one processor in a multiprocessor environment does not affect instruction caches on other processors.
This function has the following format:
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void __PAL_IMB (void); |
This function inserts an entry at the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to header and queue entries. The pointers to head and new_entry must not be equal.
This function has the following format:
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int __PAL_INSQHIL (void *head, void *new_entry); /* At head, interlocked */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on a longword boundary.
There are three possible return values:
This function inserts an entry into the front of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_INSQHILR (void *head, void *new_entry); /* At head, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on a quadword boundary.
There are three possible return values:
This function inserts an entry at the front of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to header and queue entries. The pointers to head and new_entry must not be equal.
This function has the following format:
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int __PAL_INSQHIQ (void *head, void *new_entry); /* At head, interlocked */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on an octaword boundary.
There are three possible return values:
This function inserts an entry into the front of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_INSQHIQR (void *head, void *new_entry); /* At head, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on an octaword boundary.
There are three possible return values:
This function inserts an entry at the end of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to header and queue entries. The pointers to head and new_entry must not be equal.
This function has the following format:
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int __PAL_INSQTIL (void *head, void *new_entry); /* At tail, interlocked */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on a quadword boundary.
There are three possible return values:
This function inserts an entry at the end of a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_INSQTILR (void *head, void *new_entry); /* At tail, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on a quadword boundary.
There are three possible return values:
This function inserts an entry at the end of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to header and queue entries. The pointers to head and new_entry must not be equal.
This function has the following format:
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int __PAL_INSQTIQ (void *head, void *new_entry); /* At tail, interlocked */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on an octaword boundary.
There are three possible return values:
This function inserts an entry at the end of a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. The pointers to head and new_entry must not be equal. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_INSQTIQR (void *head, void *new_entry); /* At tail, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.new_entry
A pointer to the new entry to be inserted. The entry must be aligned on an octaword boundary.
There are three possible return values:
This function inserts a new entry after an existing entry into a longword queue. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_INSQUEL (void *predecessor, void *new_entry); |
predecessor
A pointer to an existing entry in the queue.new_entry
A pointer to the new entry to be inserted.
There are two possible return values:
This function inserts a new entry after an existing entry into a longword queue deferred. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_INSQUEL_D (void **predecessor, void *new_entry); /* Deferred */ |
predecessor
A pointer to a pointer to the predecessor entry.new_entry
A pointer to the new entry to be inserted.
There are two possible return values:
This function inserts a new entry after an existing entry into a quadword queue. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_INSQUEQ (void *predecessor, void *new_entry); |
predecessor
A pointer to an existing entry in the queue.new_entry
A pointer to the new entry to be inserted.
There are two possible return values:
This function inserts a new entry after an existing entry into a quadword queue deferred. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_INSQUEQ_D (void **predecessor, void *new_entry); /* Deferred */ |
predecessor
A pointer to a pointer to the predecessor entry.new_entry
A pointer to the new entry to be inserted.
There are two possible return values:
This function returns the quadword-aligned memory object specified by address.
This function has the following format:
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unsigned __int64 __PAL_LDQP (void *address); |
address
A pointer to the quadword-aligned memory object to be returned.
If the object pointed to by address is not quadword-aligned, the result is unpredictable.
These privileged functions return the contents of a particular processor register. The XXXX indicates the processor register to be read.
These functions have the following format:
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/* AST Enable */ unsigned int __PAL_MFPR_ASTEN (void); /* AST Summary Register */ unsigned int __PAL_MFPR_ASTSR (void); /* Executive Stack Pointer */ void *__PAL_MFPR_ESP (void); /* Floating-Point Enable */ int __PAL_MFPR_FEN (void); /* Interrupt Priority Level */ int __PAL_MFPR_IPL (void); /* Machine Check Error Summary */ int __PAL_MFPR_MCES (void); /* Privileged Context Block Base */ void *__PAL_MFPR_PCBB (void); /* Processor Base Register */ __int64 __PAL_MFPR_PRBR (void); /* Page Table Base Register */ int __PAL_MFPR_PTBR (void); /* System Control Block Base */ void *__PAL_MFPR_SCBB (void); /* Software Interrupt Summary Register */ unsigned int __PAL_MFPR_SISR (void); /* Supervisor Stack Pointer */ void *__PAL_MFPR_SSP (void); /* Translation Buffer Check */ __int64 __PAL_MFPR_TBCHK (void *address); /* User Stack Pointer */ void *__PAL_MFPR_USP (void); /* Virtual Page Table */ void *__PAL_MFPR_VPTB (void); /* Who Am I */ __int64 __PAL_MFPR_WHAMI (void); |
These privileged functions load a value into one of the special processor registers. The XXXX indicates the processor register to be loaded.
These functions have the following format:
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/* AST Enable */ void __PAL_MTPR_ASTEN (unsigned int mask); /* AST Summary Register */ void __PAL_MTPR_ASTSR (unsigned int mask); /* Data Alignment Trap Fixup */ void __PAL_MTPR_DATFX (int value); /* Executive Stack Pointer */ void __PAL_MTPR_ESP (void *address); /* Floating-Point Enable */ void __PAL_MTPR_FEN (int value); /* Interprocessor Interrupt Request */ void __PAL_MTPR_IPIR (__int64 number); /* Interrupt Priority Level */ int __PAL_MTPR_IPL (int value); /* Machine Check Error Summary */ void __PAL_MTPR_MCES (int value); /* Processor Base Register */ void __PAL_MTPR_PRBR (__int64 value); /* System Control Block Base */ void __PAL_MTPR_SCBB (void *address); /* Software Interrupt Request Register */ void __PAL_MTPR_SIRR (int level); /* Supervisor Stack Pointer */ void __PAL_MTPR_SSP (int *address); /* Translation Buffer Invalidate All*/ void __PAL_MTPR_TBIA (void); /* Translation Buffer Invalidate All Process */ void __PAL_MTPR_TBIAP (void); /* Translation Buffer Invalidate Single */ void __PAL_MTPR_TBIS (void *address); /* Translation Buffer Invalidate Single Data */ void __PAL_MTPR_TBISD (void *address); /* Translation Buffer Invalidate Single Instruction */ void __PAL_MTPR_TBISI (void *address); /* User Stack Pointer */ void __PAL_MTPR_USP (void *address); /* Virtual Page Table */ void __PAL_MTPR_VPTB (void *address); |
This function checks the write accessibility of the first and last byte of the given address and length pair.
This function has the following format:
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int __PAL_PROBER (const void *base_address, int length, char mode); |
base_address
The pointer to the memory segment to be tested for read access.length
The length of the memory segment, in bytes.mode
The processor mode used for checking access.
There are two possible return values:
This function checks the write accessibility of the first and last byte of the given address and length pair.
This function has the following format:
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int __PAL_PROBEW (const void *base_address, int length, char mode); |
base_address
The pointer to the memory segment to be tested for write access.length
The length of the memory segment, in bytes.mode
The processor mode used for checking access.
There are two possible return values:
This function returns the Processor Status (PS).
This function has the following format:
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unsigned __int64 __PAL_RD_PS (void); |
This function removes the first entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries.
This function has the following format:
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int __PAL_REMQHIL (void *head, void **removed_entry); /* At head, interlocked */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the first entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_REMQHILR (void *head, void **removed_entry); /* At head, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the first entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries.
This function has the following format:
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int __PAL_REMQHIQ (void *head, void **removed_entry); /* At head, interlocked */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the first entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_REMQHIQR (void *head, void **removed_entry); /* At head, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the last entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries.
This function has the following format:
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int __PAL_REMQTIL (void *head, void **removed_entry); /* At tail, interlocked */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the last entry from a longword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_REMQTILR (void *head, void **removed_entry); /* At tail, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on a quadword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the last entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries.
This function has the following format:
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int __PAL_REMQTIQ (void *head, void **removed_entry); /* At tail, interlocked */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes the last entry from a quadword queue in an indivisible manner. This operation is interlocked against similar operations by other preprocessors or devices in the system. This function must have write access to the header and queue entries. All parts of the queue must be memory resident.
This function has the following format:
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int __PAL_REMQTIQR (void *head, void **removed_entry); /* At tail, interlocked resident */ |
head
A pointer to the queue header. The header must be aligned on an octaword boundary.removed_entry
A pointer to the address of the entry removed from the queue.
There are four possible return values:
This function removes an entry from a longword queue. This function must have write access to header and queue entries.
This function has the following format:
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int _PAL_REMQUEL (void *entry, void **removed_entry); |
entry
A pointer to the queue entry to be removed.removed_entry
A pointer to the address of the entry removed from the queue.
There are three possible return values:
This function removes an entry from a longword queue deferred. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_REMQUEL_D (void **entry, void **removed_entry); /* Deferred */ |
entry
A pointer to a pointer to the queue entry to be removed.removed_entry
A pointer to the address of the entry removed from the queue.
There are three possible return values:
This function removes an entry from a quadword queue. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_REMQUEQ (void *entry, void **removed_entry); |
entry
A pointer to the queue entry to be removed.removed_entry
A pointer to the address of the entry removed from the queue.
There are three possible return values:
This function removes an entry from a quadword queue deferred. This function must have write access to header and queue entries.
This function has the following format:
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int __PAL_REMQUEQ_D (void **entry, void **removed_entry); /* Deferred */ |
entry
A pointer to a pointer to the queue entry to be removed.removed_entry
A pointer to the address of the entry removed from the queue.
There are three possible return values:
This function writes the quadword value to the memory location pointed to by address.
This function has the following format:
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void __PAL_STQP (void *address, unsigned __int64 value); |
address
Memory location to be written to.value
Quadword value to be stored.
If the location pointed to by address is not quadword-aligned, the result is unpredictable.
This function swaps the previous state of the Asynchronous System Trap (AST) enable bit for the new state. The new state is supplied in bit 0 of new_state_mask. The previous state is returned, zero-extended.
A check is made to determine if an AST is pending. If the enabling conditions are present for an AST at the completion of this instruction, the AST occurs before the next instruction.
This function has the following format:
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unsigned int __PAL_SWASTEN (int new_state_mask); |
new_state_mask
An integer whose 0 bit is the new state of the AST enable bit.
This function returns ownership of the data structure that contains the current hardware privileged context (the HWPCB) to the operating system and passes ownership of the new HWPCB to the processor.
This function has the following format:
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void __PAL_SWPCTX (void *address); |
address
A pointer to the new HWPCB.
This function writes the low-order three bits of mask into the Processor Status software field (PS<SW>).
This function has the following format:
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void __PAL_WR_PS_SW (int mask); |
mask
An integer whose low-order three bits are written into PS<SW>.
The __ABS built-in is functionally equivalent to its counterpart, abs , in the standard header file <stdlib.h> .
Its format is also the same:
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#include <stdlib.h> int __ABS (int x); |
This built-in function does, however, offer performance improvements because there is less call overhead associated with its use.
If you include <stdlib.h> , the built-in function is automatically used for all occurrences of abs . To disable the built-in function, use #undef abs .
Acquire and Release Longword Semaphore (__ACQUIRE_SEM_LONG, __RELEASE_SEM_LONG)
The __ACQUIRE_SEM_LONG and __RELEASE_SEM_LONG functions provide a counted semaphore capability where the positive value of a longword is interpreted as the number of resources available.
The __ACQUIRE_SEM_LONG function loops until the longword has a positive value and then decrements it within a load-locked/store-conditional sequence; it then issues a memory barrier. This function returns 1 if the resource count was successfully decremented within the specified number of retries, and 0 otherwise. With no explicit retry count, the function does not return until it succeeds.
The __RELEASE_SEM_LONG function issues a memory barrier and then does an __ATOMIC_INCREMENT_LONG on the longword.
The __ACQUIRE_SEM_LONG function has the following formats:
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int __ACQUIRE_SEM_LONG (volatile void *address); int __ACQUIRE_SEM_LONG_RETRY (volatile void *address, int retry); |
The __RELEASE_SEM_LONG function has the following format:
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int __RELEASE_SEM_LONG (volatile void *address); |
address
The longword-aligned address of the resource count.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.
Add Aligned Word Interlocked ( __ADAWI)
The __ADAWI function adds its source operand to the destination. This function is interlocked against similar operations by other processors or devices in the system.
This function has the following format:
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int __ADAWI (short src, short *dest); |
src
The value to be added to the destination.dest
A pointer to the destination. The destination must be aligned on a word boundary.
The __ADAWI function returns a simulated VAX processor status longword (PSL).
Add Atomic Longword ( __ADD_ATOMIC_LONG)
The __ADD_ATOMIC_LONG function adds the specified expression to the longword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence.
This function has the following format:
|
int __ADD_ATOMIC_LONG int fnc(void *, int, ...); |
address
The address of the data segment.expression
An integer expression....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted. If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
A value of 1 is returned upon successful completion.
Add Atomic Quadword ( __ADD_ATOMIC_QUAD)
The __ADD_ATOMIC_QUAD function adds the specified expression to the quadword data segment pointed to by the address parameter within a load-locked/store-conditional code sequence.
This function has the following format:
|
int __ADD_ATOMIC_QUAD (void *address, int expression, ...); |
address
The address of the data segment.expression
An integer expression....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted. If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
A value of 1 is returned upon successful completion.
AND Atomic Longword ( __AND_ATOMIC_LONG)
The __AND_ATOMIC_LONG function performs a bit-wise or arithmetic AND of the specified expression with the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence.
This function has the following format:
|
int __AND_ATOMIC_LONG (void *address, int expression, ...); |
address
The longword-aligned address of the data segment.expression
An integer expression....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted (which will be at least once, even if the count argument is 0). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
A value of 1 is returned upon successful completion.
AND Atomic Quadword ( __AND_ATOMIC_QUAD)
The __AND_ATOMIC_QUAD function performs a bit-wise or arithmetic AND of the specified expression with the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence.
This function has the following format:
|
int __AND_ATOMIC_QUAD (void *address, int expression, ...); |
address
The address of the aligned quadword.expression
An integer expression....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted (which will be at least once, even if the count argument is 0). If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
A value of 1 is returned upon successful completion.
Atomic Add Longword (__ATOMIC_ADD_LONG)
The __ATOMIC_ADD_LONG function adds the specified expression to the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the addition was performed.
This function has one of the following formats:
|
int __ATOMIC_ADD_LONG (volatile void *address, int expression); int __ATOMIC_ADD_LONG_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The longword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Add Quadword (__ATOMIC_ADD_QUAD)
The __ATOMIC_ADD_QUAD function adds the specified expression to the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the addition was performed.
This function has one of the following formats:
|
int __ATOMIC_ADD_QUAD (volatile void *address, int expression); int __ATOMIC_ADD_QUAD_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The quadword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic AND Longword (__ATOMIC_AND_LONG)
The __ATOMIC_AND_LONG function performs a bit-wise or arithmetic AND of the specified expression with the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_AND_LONG (volatile void *address, int expression); int __ATOMIC_AND_LONG_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The longword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic AND Quadword (__ATOMIC_AND_QUAD)
The __ATOMIC_AND_QUAD function performs a bit-wise or arithmetic AND of the specified expression with the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_AND_QUAD (volatile void *address, int expression); int __ATOMIC_AND_QUAD_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The quadword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic OR Longword (__ATOMIC_OR_LONG)
The __ATOMIC_OR_LONG function performs a bit-wise or arithmetic OR of the specified expression with the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_OR_LONG (volatile void *address, int expression); int __ATOMIC_OR_LONG_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The longword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic OR Quadword (__ATOMIC_OR_QUAD)
The __ATOMIC_OR_QUAD function performs a bit-wise or arithmetic OR of the specified expression with the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_OR_QUAD (volatile void *address, int expression); int __ATOMIC_OR_QUAD_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The quadword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Increment Longword (__ATOMIC_INCREMENT_LONG)
The __ATOMIC_INCREMENT_LONG function increments by 1 the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.
This function has the following formats:
|
int __ATOMIC_INCREMENT_LONG (volatile void *address); int __ATOMIC_INCREMENT_LONG_RETRY (volatile void *address, int retry, int *status); |
address
The longword-aligned address of the data segment.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Increment Quadword (__ATOMIC_INCREMENT_QUAD)
The __ATOMIC_INCREMENT_QUAD function increments by 1 the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.
This function has the following formats:
|
int __ATOMIC_INCREMENT_QUAD (volatile void *address); __int64 __ATOMIC_INCREMENT_QUAD (volatile void *address, int retry, int *status); |
address
The quadword-aligned address of the data segment.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Decrement Longword (__ATOMIC_DECREMENT_LONG)
The __ATOMIC_DECREMENT_LONG function decrements by 1 the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.
This function has the following formats:
|
int __ATOMIC_DECREMENT_LONG (volatile void *address); int __ATOMIC_DECREMENT_LONG_RETRY (volatile void *address, int retry, int *status); |
address
The longword-aligned address of the data segment.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Decrement Quadword (__ATOMIC_DECREMENT_QUAD)
The __ATOMIC_DECREMENT_QUAD function decrements by 1 the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.
This function has the following formats:
|
int __ATOMIC_DECREMENT_QUAD (volatile void *address); __int64 __ATOMIC_DECREMENT_QUAD_RETRY (volatile void *address, int retry, int *status); |
address
The quadword-aligned address of the data segment.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Exchange Longword (__ATOMIC_EXCH_LONG)
The __ATOMIC_EXCH_LONG function stores the value of the specified expression into the aligned longword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the longword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_EXCH_LONG (volatile void *address, int expression); int __ATOMIC_EXCH_LONG_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The longword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Atomic Exchange Quadword (__ATOMIC_EXCH_QUAD)
The __ATOMIC_EXCH_QUAD function stores the value of the specified expression into the aligned quadword pointed to by the address parameter within a load-locked/store-conditional code sequence and returns the value of the quadword before the operation was performed.
This function has one of the following formats:
|
int __ATOMIC_EXCH_QUAD (volatile void *address, int expression); int __ATOMIC_EXCH_QUAD_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The quadword-aligned address of the data segment.expression
An integer expression.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Allocate Bytes from Stack ( __ALLOCA)
The __ALLOCA function allocates n bytes from the stack.
This function has the following format:
|
void *__ALLOCA (unsigned int n); |
n
The number of bytes to be allocated.
A pointer to the allocated memory is returned.
Single-Precision, Floating-Point Arithmetic Built-in Functions
The following built-in functions provide single-precision, floating-point chopped arithmetic:
| __ADDF_C | __ADDS_C | __SUBF_C | __SUBS_C |
| __MULF_C | __MULS_C | __DIVF_C | __DIVS_C |
They have the following format:
|
float __op{F,S}_C (float operand1, float operand2); |
Where op is one of ADD, SUB, MUL, DIV, and {F,S} represents VAX or IEEE floating-point arithmetic.
The result of the arithmetic operation is returned.
Double-Precision, Floating-Point Arithmetic Built-in Functions
The following built-in functions provide double-precision, floating-point chopped arithmetic:
| __ADDG_C | __ADDT_C | __SUBG_C | __SUBT_C |
| __MULG_C | __MULT_C | __DIVG_C | __DIVT_C |
They have the following format:
|
double __op{G,T}_C (double operand1, double operand2); |
Where op is one of ADD, SUB, MUL, DIV, and {G,T} represents VAX or IEEE floating-point arithmetic.
The result of the arithmetic operation is returned.
Built-in functions are provided to copy selected portions of single- and double-precision, floating-point numbers.
These built-in functions have the following format:
|
float __CPYSF (float operand1, float operand2); double __CPYS (double operand1, double operand2); float __CPYSNF (float operand1, float operand2); double __CPYSN (double operand1, double operand2); float __CPYSEF (float operand1, float operand2); double __CPYSE (double operand1, double operand2); |
The copy sign built-in functions (__CPYSF and __CPYS) fetch the sign bit in operand1, concatenate it with the exponent and fraction bits from operand2, and return the result.
The copy sign negate built-in functions (__CPYSNF and __CPYSN) fetch the sign bit in operand1, complement it, concatenate it with the exponent and fraction bits from operand2, and return the result.
The copy sign exponent built-in functions (__CPYSEF and __CPYSE) fetch the sign and exponent bits from operand1, concatenate them with the fraction bits from operand2, and return the result.
Compare Store Longword ( __CMP_STORE_LONG)
The __CMP_STORE_LONG function has the following format:
|
int __CMP_STORE_LONG (void *source, int old_value, int new_value, void *dest); |
This function compares the value pointed to by source with the longword old_value. If they are equal, the longword new_value is stored into the value pointed to by dest. The comparison is within a load-locked/store-conditional code sequence.
The function returns 0 if the two values are unequal, if source and dest are not in the same 16-byte lock region, or if some other process accessed the 16-byte lock region before new_value could be stored. The function returns 1 if the two values are equal and new_value was stored atomically.
Compare Store Quadword ( __CMP_STORE_QUAD)
The __CMP_STORE_QUAD function has the following format:
|
int __CMP_STORE_QUAD (void *source, __int64 old_value, __int64 new_value, void *dest); |
This function compares the value pointed to by source with the quadword old_value. If they are equal, the quadword new_value is stored into the value pointed to by dest. The comparison is within a load-locked/store-conditional code sequence.
The function returns 0 if the two values are unequal, if source and dest are not in the same 16-byte lock region, or if some other process accessed the 16-byte lock region before new_value could be stored. The function returns 1 if the two values are equal and new_value was stored atomically.
The __COS built-in function is functionally equivalent to its counterpart, cos , in the standard header file <math.h> .
Its format is also the same:
|
#include <math.h> double __COS (double x); |
x
A radian value.
This built-in function does, however, offer performance improvements because there is less call overhead associated with its use.
If you include <math.h> , the built-in function is automatically used for all occurrences of cos . To disable the built-in function, use #undef cos .
Convert G_Floating to F_Floating Chopped ( __CVTGF_C)
The __CVTGF_C function converts a double-precision, VAX G_floating-point number to a single-precision, VAX F_floating-point number. This conversion chops to single-precision; then the 8-bit exponent range is checked for overflow or underflow.
This function has the following format:
|
float __CVTGF_C (double operand); |
operand
A double-precision, VAX floating-point number.
Convert G-Floating to Quadword ( __CVTGQ)
The __CVTGQ function rounds a double-precision, VAX floating-point number to a 64-bit integer value and returns the result.
This function has the following format:
|
__int64 __CVTGQ (double operand); |
operand
A double-precision, VAX floating-point number.
Convert IEEE T_Floating to IEEE S_Floating Chopped ( __CVTTS_C)
The __CVTTS_C function converts a double-precision, IEEE T_floating-point number to a single-precision, IEEE S_floating-point number. This conversion chops to single-precision; then the 8-bit exponent range is checked for overflow or underflow.
This function has the following format:
|
float __CVTTS_C (double operand); |
operand
A double-precision, IEEE floating-point number.
Convert IEEE T-Floating to Quadword ( __CVTTQ)
The __CVTTQ function rounds a double-precision, IEEE-floating-point number to a 64-bit integer value and returns the result.
This function has the following format:
|
__int64 __CVTTQ (double operand); |
operand
A double-precision, IEEE T-floating-point number.
Floating-Point Absolute Value ( __FABS)
The __FABS built-in function is functionally equivalent to its counterpart, fabs , in the standard header file <math.h> .
Its format is also the same:
|
#include <math.h> double __FABS (double x); |
x
A floating-point number.
This built-in function does, however, offer performance improvements because there is no call overhead associated with its use.
If you include <math.h> , the built-in function is automatically used for all occurrences of fab . To disable the built-in function, use #undef fab .
Test for Bit Clear then Clear Bit Interlocked (__INTERLOCKED_TESTBITCC_QUAD)
The __INTERLOCKED_TESTBITCC_QUAD function performs the following functions in interlocked fashion:
This function has the following formats:
|
int __INTERLOCKED_TESTBITCC_QUAD (volatile void *address, int bit_position); int __INTERLOCKED_TESTBITCC_QUAD_RETRY (volatile void *address, int bit_position, int retry, int *status); |
address
The quadword-aligned base address of the bit field.bit_position
The position within the field of the bit that you want cleared, in the range of 0 to 63.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the quadword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
Test for Bit Set Then Set Bit Interlocked (__INTERLOCKED_TESTBITSS_QUAD)
The __INTERLOCKED_TESTBITSS_QUAD function performs the following functions in interlocked fashion:
This function has the following formats:
|
int __INTERLOCKED_TESTBITSS_QUAD (volatile void *address, int bit_position); int __INTERLOCKED_TESTBITSS_QUAD_RETRY (volatile void *address, int expression, int retry, int *status); |
address
The quadword-aligned base address of the bit field.bit_position
The position within the field of the bit that you want cleared, in the range of 0 to 63.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.status
A pointer to an integer that is set to 0 if the operation did not succeed within the specified number of retries, and set to 1 if the operation succeeded.
The _leadz built-in function returns the number of leading zeroes (starting at the most significant bit position) in its argument. For example, _leadz(1) returns 63, and _leadz(0) returns 64.
This function has the following format:
|
__int64 _leadz (unsigned __int64); |
Lock and Unlock Longword (__LOCK_LONG, __UNLOCK_LONG)
The __LOCK_LONG and __UNLOCK_LONG functions provide a binary spinlock capability based on the low-order bit of a longword.
The __LOCK_LONG function executes in a loop waiting for the bit to be cleared and then sets it within a load-locked/store-conditional sequence; it then issues a memory barrier. The __UNLOCK_LONG function issues a memory barrier and then zeroes the longword.
The __LOCK_LONG_RETRY function returns 1 if the lock was acquired in the specified number of retries and 0 if the lock was not acquired.
The __LOCK_LONG function has the following formats:
|
int __LOCK_LONG (volatile void *address); int __LOCK_LONG_RETRY (volatile void *address, int retry); |
The __UNLOCK_LONG function has the following format:
|
int __UNLOCK_LONG (volatile void *address); |
address
The quadword-aligned address of the longword used for the lock.retry
A retry count of type int that indicates the number of times the operation is attempted (which is at least once, even if the retry argument is 0). If the operation cannot be performed successfully in the specified number of retries, the function returns without updating the longword.
Longword Absolute Value ( __LABS)
The __LABS built-in function is functionally equivalent to its counterpart, labs , in the standard header file <stdlib.h> .
Its format is also the same:
|
#include <stdlib.h> long int __LABS (long int x); |
x
An integer.
This built-in function does, however, offer performance improvements because there is less call overhead associated with its use.
If you include <stdlib.h> , the built-in function is automatically used for all occurrences of labs . To disable the built-in function, use #undef labs .
The __MB function directs the compiler to generate a memory barrier instruction.
This function has the following format:
|
void __MB (void); |
Memory Copy and Set Functions ( __MEMCPY, __MEMMOVE, __MEMSET)
The __MEMCPY, __MEMMOVE, and __MEMSET built-in functions are functionally equivalent to their counterparts in the standard header file <string.h> .
Their format is also the same:
|
#include <string.h> void *__MEMCPY (void *s1, const void *s2, size_t size); void *__MEMMOVE (void *s1, const void *s2, size_t size); void *__MEMSET (void *s, int value, size_t size); |
These built-in functions do, however, offer performance improvements because there is less call overhead associated with their use.
If you include <string.h> , the built-in functions are automatically used for all occurrences of memcpy , memmove , and memset . To disable the built-in functions, use #undef memcpy , #undef memmove , and #undef memset .
The _popcnt built-in function returns the number of "1" bits (0 to 64) in its argument. For example, _popcnt(12) returns 2.
This function has the following format:
|
__int64 _popcnt (unsigned __int64); |
The _poppar built-in function returns 1 if the number of "1" bits in its argument is odd; otherwise it returns 0. For example, _poppar(12) returns 0.
This function has the following format:
|
__int64 _poppar (unsigned __int64); |
Read Process Cycle Counter ( __RPCC)
The __RPCC function reads the current process cycle counter.
This function has the following format:
|
__int64 __RPCC (void); |
The __SIN built-in function is functionally equivalent to its counterpart in the standard header file <math.h> .
Its format is also the same:
|
#include <math.h> double __SIN (double x); |
x
A radian value.
This built-in function does, however, offer performance improvements because there is less call overhead associated with its use.
If you include <math.h> , the built-in function is used automatically for all occurrences of sin . To disable the built-in function, use #undef sin .
Test for Bit Clear then Clear Bit Interlocked ( __TESTBITCCI)
The __TESTBITCCI function performs the following operations in interlocked fashion:
This function has the following format:
|
int __TESTBITCCI (void *address, int position, ...); |
address
The base address of the field.position
The position within the field of the bit that you want cleared....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted. If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
Test for Bit Set then Set Bit Interlocked ( __TESTBITSSI)
The __TESTBITSSI function performs the following operations in interlocked fashion:
This function has the following format:
|
int __TESTBITSSI (void *address, int position, ...); |
address
The base address of the field.position
The position within the field of the bit that you want set....
An optional retry count of type int . If specified, the retry count indicates the number of times the operation is attempted. If the operation cannot be performed successfully in the specified number of retries, a value of 0 is returned.
The _trailz built-in function returns the number of trailing zeros (counting after the least significant set bit to the least significant bit position) in its argument. For example, _trailz(2) returns 1, and _trailz(0) returns 64.
This function has the following format:
|
__int64 _trailz (unsigned __int64); |
Trap Barrier Instruction ( __TRAPB)
The __TRAPB function allows software to guarantee that, in a pipeline implementation, all previous arithmetic instructions will be completed without incurring any arithmetic traps before any instructions after the TRAPB instruction are issued.
This function has the following format:
|
void __TRAPB (void); |
Unsigned Quadword Multiply High ( __UMULH)
The __UMULH function performs a quadword multiply high instruction.
This function has the following format:
|
unsigned __int64 __UMULH (unsigned __int64 operand1, unsigned __int64 operand2); |
operand1
A 64-bit unsigned integer.operand2
A 64-bit unsigned integer.
The two operands are multiplied as unsigned integers to produce a 128-bit result. The high order 64-bits are returned.
The HP C++ built-in functions available on OpenVMS Alpha systems are also available on I64 systems, with some differences, as described in this section. This section also describes built-in functions that are specific to I64 systems.
The <builtins.h> header file contains comments noting which built-in functions are not available or are not the preferred form for I64 systems. The compiler issues diagnostics where using a different built-in function for I64 systems would be preferable.
The comments in <builtins.h> reflect only what is explicitly present in that header file itself, and in the compiler implementation. You should also consult the content and comments in <pal_builtins.h> to determine more accurately what functionality is effectively provided by including <builtins.h> . For example, if a program explicitly declares one of the Alpha built-in functions and invokes it without having included <builtins.h> , the compiler might issue the BIFNOTAVAIL error message, regardless of whether or not the function is available through a system service. If the compilation does include <builtins.h> , and BIFNOTAVAIL is issued, then either there is no support at all for the built-in function or a new version of <pal_builtins.h> is needed. |
Here is a summary of these differences on I64 systems:
__int64 __RETURN_ADDRESS(void); |
The <builtins.h> header file contains a section at the top conditionalized to just __ia64 with the support for built-in functions specific to I64 systems. This includes macro definitions for all of the registers that can be specified to the __getReg, __setReg, __getIndReg, and __setIndReg built-in functions. Parameters that are const -qualified require an argument that is a compile-time constant.
The following sections describe the HP C++ built-in functions available on OpenVMS I64 systems.
Get Hardware Register Value ( __getReg)
The __getReg function gets the value from a hardware register based on the register index specified. This function produces a corresponding mov = r instruction.
This function has the following format:
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unsigned __int64 __getReg (const int whichReg); |
whichReg
The index of the hardware register from which the value is obtained. The __getReg and __setReg functions can access the following registers:
Register Name whichReg _IA64_REG_IP 1016 _IA64_REG_PSR 1019 _IA64_REG_PSR_L 1019 General Integer Registers: Register Name whichReg _IA64_REG_GP 1025 _IA64_REG_SP 1036 _IA64_REG_TP 1037 Application Registers: Register Name whichReg _IA64_REG_AR_KR0 3072 _IA64_REG_AR_KR1 3073 _IA64_REG_AR_KR2 3074 _IA64_REG_AR_KR3 3075 _IA64_REG_AR_KR4 3076 _IA64_REG_AR_KR5 3077 _IA64_REG_AR_KR6 3078 _IA64_REG_AR_KR7 3079 _IA64_REG_AR_RSC 3088 _IA64_REG_AR_BSP 3089 _IA64_REG_AR_BSPSTORE 3090 _IA64_REG_AR_RNAT 3091 _IA64_REG_AR_FCR 3093 _IA64_REG_AR_EFLAG 3096 _IA64_REG_AR_CSD 3097 _IA64_REG_AR_SSD 3098 _IA64_REG_AR_CFLAG 3099 _IA64_REG_AR_FSR 3100 _IA64_REG_AR_FIR 3101 _IA64_REG_AR_FDR 3102 _IA64_REG_AR_CCV 3104 _IA64_REG_AR_UNAT 3108 _IA64_REG_AR_FPSR 3112 _IA64_REG_AR_ITC 3116 _IA64_REG_AR_PFS 3136 _IA64_REG_AR_LC 3137 _IA64_REG_AR_EC 3138 Control Registers: Register Name whichReg _IA64_REG_CR_DCR 4096 _IA64_REG_CR_ITM 4097 _IA64_REG_CR_IVA 4098 _IA64_REG_CR_PTA 4104 _IA64_REG_CR_IPSR 4112 _IA64_REG_CR_ISR 4113 _IA64_REG_CR_IIP 4115 _IA64_REG_CR_IFA 4116 _IA64_REG_CR_ITIR 4117 _IA64_REG_CR_IIPA 4118 _IA64_REG_CR_IFS 4119 _IA64_REG_CR_IIM 4120 _IA64_REG_CR_IHA 4121 _IA64_REG_CR_LID 4160 _IA64_REG_CR_IVR 4161 * _IA64_REG_CR_TPR 4162 _IA64_REG_CR_EOI 4163 _IA64_REG_CR_IRR0 4164 * _IA64_REG_CR_IRR1 4165 * _IA64_REG_CR_IRR2 4166 * _IA64_REG_CR_IRR3 4167 * _IA64_REG_CR_ITV 4168 _IA64_REG_CR_PMV 4169 _IA64_REG_CR_CMCV 4170 _IA64_REG_CR_LRR0 4176 _IA64_REG_CR_LRR1 4177 * getReg only
Set Hardware Register Value ( __setReg)
The __setReg function sets the value for a hardware register based on the register index specified. This function produces a corresponding mov = r instruction.
This function has the following format:
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void __setReg (const int whichReg, unsigned __int64 value); |
whichReg
The index of the hardware register whose value is being set. See the __getReg functions for the list of registers that can be accessed.value
The value to which the register is set.
Get Index Register Value ( __getIndReg)
The __getIndReg function returns the value of an indexed register. The function accesses a register (index) in a register file (whichIndReg) of 64-bit registers.
This function has the following format:
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unsigned __int64 __getIndReg (const int whichIndReg, __int64 index); |
whichIndReg
The register file.index
The index in the register file of the hardware register whose value is being requested. See the __getReg functions for the list of registers that can be accessed.Indirect Registers for getIndReg and setIndReg:
Register Name whichReg _IA64_REG_INDR_CPUID 9000 * _IA64_REG_INDR_DBR 9001 _IA64_REG_INDR_IBR 9002 _IA64_REG_INDR_PKR 9003 _IA64_REG_INDR_PMC 9004 _IA64_REG_INDR_PMD 9005 _IA64_REG_INDR_RR 9006 _IA64_REG_INDR_RESERVED 9007 * getIndReg only
Set Index Register Value ( __setIndReg)
The __setIndReg function copies a value into an indexed register. The function accesses a register (index) in a register file (whichIndReg) of 64-bit registers.
This function has the following format:
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void __setIndReg (const int whichIndReg, __int64 index, unsigned __int64 value); |
whichIndReg
The register file.index
The index in the register file of the hardware register to be set. See the __getIndReg function for the list of registers that can be accessed.value
The value to which the register is set.
Generate Break Instruction ( __break)
The __break function generates a break instruction with an immediate.
This function has the following format:
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void __break (const int __break_arg); |
__break_arg
An immediate value for the __break instruction to use.
The __dsrlz function serializes data. Maps to the srlz.d instruction.
This function has the following format:
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void __dsrlz (void); |
Flush Cache Instruction ( __fc)
The __fc function flushes a cache line associated with the address given by the argument. Maps to the fcr instruction.
This function has the following format:
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void __fc (__int64 __address); |
__address
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
The __fwb function flushes the write buffers. Maps to the fwb instruction.
This function has the following format:
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void __fwb (void); |
The __invalat function invalidates ALAT. Maps to the invala instruction.
This function has the following format:
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void __invalat (void); |
The __invala function is the same as the __invalat function.
The __isrlz function executes the serialize instruction. Maps to the srlz.i instruction.
This function has the following format:
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void __isrlz (void); |
Insert Data Address Translation Cache ( __itcd)
The __itcd function inserts an entry into the data translation cache. Maps to the itc.d instruction.
This function has the following format:
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void __itcd (__int64 pa); |
pa
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Insert Instruction Address Translation Cache ( __itci)
The __itci function inserts an entry into the instruction translation cache. Maps to the itc.i instruction.
This function has the following format:
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void __itci (__int64 pa); |
pa
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Insert Data Translation Register ( __itrd)
The __itrd function maps to the itr.d instruction.
This function has the following format:
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void __itrd (__int64 whichTransReg, __int64 pa); |
whichTransReg
The data translation register to be used by the itr.d instruction.pa
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Insert Instruction Translation Register ( __itri)
The __itri function maps to the itr.i instruction.
This function has the following format:
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void __itri (__int64 whichTransReg, __int64 pa); |
whichTransReg
The data translation register to be used by the itr.i instruction.pa
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Purge Translation Cache Entry ( __ptce)
The __ptce function maps to the ptc.e instruction.
This function has the following format:
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void __ptce (__int64 va); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Purge Global Translation Cache ( __ptcg)
The __ptcg function purges the global translation cache. Maps to the ptc.g r,r instruction.
This function has the following format:
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void __ptcg (__int64 va, __int64 pagesz); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.pagesz
The address range of the purge.
Purge Local Translation Cache ( __ptcl)
The __ptcl function purges the local translation cache. Maps to the ptc.l r,r instruction.
This function has the following format:
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void __ptcl (__int64 va, __int64 pagesz); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.pagesz
The address range of the purge.
Purge Global Translation Cache and ALAT ( __ptcga)
The __ptcga function purges the global translation cache and ALAT. Maps to the ptc.ga r,r instruction.
This function has the following format:
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void __ptcga (__int64 va, __int64 pagesz); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.pagesz
The address range of the purge.
Purge Data Translation Register ( __ptrd)
The __ptrd function purges the data translation register. Maps to the ptr.d r,r instruction.
This function has the following format:
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void __ptrd (__int64 va, __int64 pagesz); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.pagesz
The address range of the purge.
Purge Instruction Translation Register ( __ptri)
The __ptri function purges the instruction translation register. Maps to the ptr.i r,r instruction.
This function has the following format:
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void __ptri (__int64 va, __int64 pagesz); |
va
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.pagesz
The address range of the purge.
The __rsm function resets the system mask bits of the PSR. Maps to the rsm imm24 instruction.
This function has the following format:
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void __rsm (int mask); |
mask
An integer value inserted into the instruction as a 24-bit immediate value.
The __rum function resets the user mask.
This function has the following format:
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void __rum (int mask); |
mask
An integer value inserted into the instruction as a 24-bit immediate value.
The __ssm function sets the system mask.
This function has the following format:
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void __ssm (int mask); |
mask
An integer value inserted into the instruction as a 24-bit immediate value.
The __sum function sets the user mask bits of the PSR. Maps to the sum imm24 instruction.
This function has the following format:
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void __sum (int mask); |
mask
An integer value inserted into the instruction as a 24-bit immediate value.
Enable Memory Synchronization ( __synci)
The __synci function enables memory synchronization. Maps to the sync.i instruction.
This function has the following format:
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void __synci (void); |
Translation Hashed Entry Address ( __thash)
The __thash function generates a translation hash entry address. Maps to the thash r = r instruction.
This function has the following format:
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void __thash(__int64 __address); |
__address
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Translation Hashed Entry Tag ( __ttag)
The __ttag function generates a translation hash entry tag. Maps to the ttag r=r instruction.
This function has the following format:
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void __ttag(__int64 __address); |
__address
A 64-bit address, as opposed to a 32-bit or 64-bit pointer, that is loaded into a 64-bit general register used by the instruction to be generated.
Atomic Compare and Exchange ( _InterlockedCompareExchange_acq)
The _InterlockedCompareExchange_acq function atomically compares and exchanges the value specified by the first argument (a 64-bit pointer). This function maps to the cmpxchg4.acq instruction with appropriate setup.
This function has the following format:
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unsigned __int64 _InterlockedCompareExchange_acq (volatile unsigned int *Destination, unsigned __int64 Newval, unsigned __int64 Comparand); |
The value at *Destination is compared with the value specified by Comparand. If they are equal, Newval is written to *Destination, and Oldval is returned. The exchange will have taken place if the value returned is equal to the Comparand. The following algorithm is used:
ar.ccv = Comparand;
Oldval = *Destination; //Atomic
if (ar.ccv == *Destination) //Atomic
*Destination = Newval; //Atomic
return Oldval;
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Those parts of the algorithm that are marked "Atomic" are performed atomically by the cmpxchg4.acq instruction. This instruction has acquire ordering semantics; that is, the memory read/write is made visible prior to all subsequent data memory accesses of the Destination by other processors.
Destination
The value to be compared with Comparand and, if equal, replaced with the value of Newval.Newval
The new value to replace the value in Destination.Comparand
The value with which to compare Destination.
Atomic Compare and Exchange ( _InterlockedCompareExchange64_acq)
The _InterlockedCompareExchange64_acq function is the same as the _InterlockedCompareExchange_acq function, except that those parts of the algorithm that are marked "Atomic" are performed by the cmpxchg8.acq instruction.
This function has the following format:
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unsigned __int64 _InterlockedCompareExchange64_acq (volatile unsigned __int64 *Destination, unsigned __int64 Newval, unsigned __int64 Comparand); |
Atomic Compare and Exchange ( _InterlockedCompareExchange_rel)
This function is the same as the _InterlockedCompareExchange_acq function except that those parts of the algorithm that are marked "Atomic" are performed by the cmpxchg4.rel instruction with release ordering semantics; that is, the memory read/write is made visible after all previous memory accesses of the Destination by other processors.
This function has the following format:
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unsigned __int64 _InterlockedCompareExchange_rel (volatile unsigned int *Destination, unsigned __int64 Newval, unsigned __int64 Comparand); |
Atomic Compare and Exchange ( _InterlockedCompareExchange64_rel)
This function is the same as the _InterlockedCompareExchange_rel function, except that those parts of the algorithm that are marked "Atomic" are performed by the cmpxchg8.rel instruction.
This function has the following format:
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unsigned __int64 _InterlockedCompareExchange64_rel (volatile unsigned __int64 *Destination, unsigned __int64 Newval, unsigned __int64 Comparand); |
Conditional Atomic Compare and Exchange Longword (__CMP_SWAP_LONG)
The __CMP_SWAP_LONG function performs a conditional atomic compare and exchange operation on a longword. The longword pointed to by source is read and compared with the longword old_value. If they are equal, the longword new_value is written into the longword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_LONG (volatile void *source, int old_value, int new_value); |
source
The longword value to be compared with old_value.old_value
The longword value source is compared with.new_value
The longword value written into source if source and old_value are equal.
Conditional Atomic Compare and Exchange Quadword (__CMP_SWAP_QUAD)
The __CMP_SWAP_QUAD function performs a conditional atomic compare and exchange operation on a quadword. The quadword pointed to by source is read and compared with the quadword old_value. If they are equal, the quadword new_value is written into the quadword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_QUAD (volatile void *source, int old_value, int new_value); |
source
The quadword value to be compared with old_value.old_value
The quadword value source is compared with.new_value
The quadword value written to source if source and old_value are equal.
Conditional Atomic Compare and Exchange Longword with Acquire Semantics ( __CMP_SWAP_LONG_ACQ)
The __CMP_SWAP_LONG_ACQ function performs a conditional atomic compare and exchange operation with acquire semantics on a longword. The longword pointed to by source is read and compared with the longword old_value. If they are equal, the longword new_value is written into the longword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
Acquire memory ordering guarantees that the memory read/write is made visible before all subsequent data accesses to the same memory location by other processors.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_LONG_ACQ (volatile void *source, int old_value, int new_value); |
source
The longword value to be compared with old_value.old_value
The longword value source is compared with.new_value
The longword value written into source if source and old_value are equal.
Conditional Atomic Compare and Exchange Quadword with Acquire Semantics ( __CMP_SWAP_QUAD_ACQ)
The __CMP_SWAP_QUAD_ACQ function performs a conditional atomic compare and exchange operation with acquire semantics on a quadword. The quadword pointed to by source is read and compared with the quadword old_value. If they are equal, the quadword new_value is written into the quadword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
Acquire memory ordering guarantees that the memory read/write is made visible before all subsequent memory data accesses to the same memory location by other processors.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_QUAD_ACQ (volatile void *source, int old_value, int new_value); |
source
The quadword value to be compared with old_value.old_value
The quadword value source is compared with.new_value
The quadword value written into source if source and old_value are equal.
Conditional Atomic Compare and Exchange Longword with Release Semantics ( __CMP_SWAP_LONG_REL)
The __CMP_SWAP_LONG_REL function performs a conditional atomic compare and exchange operation with release semantics on a longword. The longword pointed to by source is read and compared with the longword old_value. If they are equal, the longword new_value is written into the longword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
Release memory ordering guarantees that the memory read/write is made visible after all previous data memory acceses to the same memory location by other processors.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_LONG_REL (volatile void *source, int old_value, int new_value); |
source
The longword value to be compared with old_value.old_value
The longword value source is compared with.new_value
The longword value written into source if source and old_value are equal.
Conditional Atomic Compare and Exchange Quadword with Release Semantics ( __CMP_SWAP_QUAD_REL)
The __CMP_SWAP_QUAD_REL function performs a conditional atomic compare and exchange operation with release semantics on a quadword. The quadword pointed to by source is read and compared with the quadword old_value. If they are equal, the quadword new_value is written into the quadword pointed to by source. The read and write is performed atomically, with no intervening access to the same memory region.
Release memory ordering guarantees that the memory read/write is made visible after all previous data memory acceses to the same memory location by other processors.
The function returns 1 if the write occurs, and 0 otherwise.
This function has the following format:
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int __CMP_SWAP_QUAD_REL (volatile void *source, int old_value, int new_value); |
source
The quadword value to be compared with old_value.old_value
The quadword value source is compared with.new_value
The quadword value written into source if source and old_value are equal.
Return Address ( __RETURN_ADDRESS)
The __RETURN_ADDRESS function produces the address to which the function containing the built-in call will return as a 64-bit integer (on Alpha systems, the value of R26 on entry to the function; on I64 systems, the value of B0 on entry to the function).
This built-in function cannot be used within a function specified to use nonstandard linkage.
This function has the following format:
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__int64 __RETURN_ADDRESS (void); |
Implement Alpha __PAL_GENTRAP and __PAL_BUGCHK Builtins (__break2)
The __break2 function is used to implement the Alpha __PAL_GENTRAP and __PAL_BUGCHK built-in functions on OpenVMS I64 systems.
The __break2 function is equivalent to the __break function with the second parameter passed in general register 17:
R17 = __R17_value; __break (__break_code); |
This function has the following format:
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void __break2 (__Integer_Constant __break_code, unsigned __int64 __r17_value); |
__breakcode
The particular software condition that has occurred.__r17_value
The value of R17, a volatile general register reserved by the OpenVMS Itanium calling standard for use by compiled code to communicate with specialized compiler support routines that require out-of-band information passing.
Flush Register Stack ( __flushrs)
The __flushrs function flushes the register stack.
This function has the following format:
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void __flushrs (void); |
Load Register Stack ( __loadrs)
The __loadrs function loads the register stack.
This function has the following format:
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void __loadrs (void); |
Probe Read-Access Permission ( __prober)
The __prober function determines whether read access to the virtual address specified by __address bits {60:0} and the region register indexed by __address bits {63:61} is permitted at the privilege level given by __mode bits {1:0}. It returns 1 if the access is permitted, and 0 otherwise.
This function can probe only with equal or lower privilege levels. If the specified privilege level is higher (lower number), then the probe is performed with the current privilege level.
This function is the same as the Intel __probe_r function.
This function has the following format:
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int __prober (__int64 __address, unsigned int __mode); |
__address
Virtual address for which read-access permission is being checked.__mode
Privilege level for which read-access permission is being checked.
Probe Write-Access Permission ( __probew)
The __probew function determines whether write access to the virtual address specified by __address bits {60:0} and the region register indexed by __address bits {63:61}, is permitted at the privilege level given by __mode bits {1:0}. It returns 1 if the access is permitted, and 0 otherwise.
This function can probe only with equal or lower privilege levels. If the specified privilege level is higher (lower number), then the probe is performed with the current privilege level.
This function is the same as the Intel __probe_w function.
This function has the following format:
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int __probew (__int64 __address, unsigned int __mode); |
__address
Virtual address for which write-access permission is being checked.__mode
Privilege level for which write-access permission is being checked.
Translation Access Key ( __tak)
The __tak function returns the translation access key.
This function has the following format:
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unsigned int __tak (__int64 __address); |
__address
Virtual address for translation key is being returned.
Translate to Physical Address ( __tpa)
The __tpa function translates a virtual address to a physical address.
This function has the following format:
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__int64 __tpa(__int64 __address); |
__address
Virtual address to be translated.
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