AdapterID 07154h

AdapterName  "HyperEnet MCA Combo"

Numbytes 1


nameditem
	Prompt	"I/O, EPROM"

;Selections with boot ROM enabled

     Choice  "1000H-102FH,  0C8000H-0CBFFFH"

	  pos[0]=xxx0001xb
	  io 1000h-102fh
	  mem 0C8000H-0CBFFFH

     Choice "2020H-204FH, 0C8000H-0CBFFFH"

	  pos[0]=xxx0010xb
	  io 2020h-204Fh
	  mem 0C8000H-0CBFFFH

     Choice "8020H-804FH, 0CC000H-0CFFFFH"

	  pos[0]=xxx0011xb
	  io 8020H-804FH
	  mem 0CC000H-0CFFFFH

     Choice "0A0A0H-0A0CFH, 0CC000H-0CFFFFH"

	  pos[0]=xxx0100xb
	  io 0A0A0H-0A0CFH
	  mem 0CC000H-0CFFFFH

     Choice "0B0B0H-0B0DFH, 0D0000H-0D3FFFH"

	  pos[0]=xxx0101xb
	  io 0B0B0H-0B0DFH
	  mem 0D0000H-0D3FFFH

     Choice "0C0C0H-0C0EFH, 0D0000H-0D3FFFH"

	  pos[0]=xxx0110xb
	  io 0C0C0H-0C0EFH
	  mem 0D0000H-0D3FFFH

     Choice "0C3D0H-0C3FFH, 0D4000H-0D7FFFH"

	  pos[0]=xxx0111xb
	  io 0C3D0H-0C3FFH
	  mem 0D4000H-0D7FFFH





;Selections with boot ROM disabled

     Choice "1000H-102FH,DISABLED"

	  pos[0]=xxx1001xb
	  io 1000h-102fh

     Choice "2020H-204FH,DISABLED"

	  pos[0]=xxx1010xb
	  io 2020H-204fH

     Choice "8020H-804FH,DISABLED"

	  pos[0]=xxx1011xb
	  io 8020h-804fh

     Choice "0A0A0H-0A0CFH,DISABLED"

	  pos[0]=xxx1100xb
	  io 0A0A0h-0A0CFh

     Choice "0B0B0H-0B0DFH,DISABLED"

	  pos[0]=xxx1101xb
	  io 0B0B0h-0B0DFh

     Choice "0C0C0H-0C0EFH,DISABLED"

	  pos[0]=xxx1110xb
	  io 0C0C0H-0C0EFH

     Choice "0C3D0H-0C3FFH,DISABLED"

	  pos[0]=xxx1111xb
	  io 0C3D0H-0C3FFH


HELP

"The I/O address range shown are the addresses at which the adapter
 will decode for the adapter's control and data i/o.

The EPROM address block is decoded for the use of a remote
boot EPROM.  This option may be disabled."



nameditem
	Prompt	"Interrupt level"

     Choice "IRQ 3"
     pos[0]=x00xxxxxb
     int 3

     Choice "IRQ 4"
     pos[0]=x01xxxxxb
     int 4

     Choice "IRQ 5"
     pos[0]=x10xxxxxb
     int 5

     Choice "IRQ 9"
     pos[0]=x11xxxxxb
     int 9


HELP

"The IRQ selection assigns which interrupt
request line the lan adapter will use to
signal the microprocessor  via the interrupt
controller."