Appendix B |
Appendix B
|
Unwind Descriptor Record Format
|
B.1
|
Region Header Records
|
B.1.1
|
Format R1
|
B.1.2
|
Format R2
|
B.1.3
|
Format R3
|
B.2
|
Descriptor Records for Prologue Regions
|
B.2.1
|
Format P1
|
B.2.2
|
Format P2
|
B.2.3
|
Format P3
|
B.2.4
|
Format P4
|
B.2.5
|
Format P5
|
B.2.6
|
Format P6
|
B.2.7
|
Format P7
|
B.2.8
|
Format P8
|
B.2.9
|
Format P9
|
B.2.10
|
Format P10
|
B.3
|
Descriptor Records for Body Regions
|
B.3.1
|
Format B1
|
B.3.2
|
Format B2
|
B.3.3
|
Format B3
|
B.3.4
|
Format B4
|
B.4
|
Descriptor Records for Body or Prologue Regions
|
B.4.1
|
Format X1
|
B.4.2
|
Format X2
|
B.4.3
|
Format X3
|
B.4.4
|
Format X4
|
Appendix C |
Appendix C
|
Summary of Differences from the Intel Itanium Software Conventions
|
C.1
|
Changes
|
C.2
|
Extensions
|
Index |
Index |
Examples |
3-1 |
Entry Code for a Stack Frame Procedure |
3-2 |
Entry Code for a Register Frame Procedure |
3-3 |
Exit Code Sequence for a Stack Frame |
3-4 |
Exit Code Sequence for a Register Frame |
5-1 |
Code for Examining the Procedure Value |
Figures |
2-1 |
Stack Frame Generated by CALLG or CALLS Instruction |
2-2 |
Argument List Format |
3-1 |
Stack Frame Procedure Descriptor (PDSC) |
3-2 |
Fixed-Size Stack Frame Format |
3-3 |
Variable-Size Stack Frame Format |
3-4 |
Register Save Area (RSA) Layout |
3-5 |
Register Save Area (RSA) Example |
3-6 |
Register Frame Procedure Descriptor (PDSC) |
3-7 |
Null Frame Procedure Descriptor (PDSC) Format |
3-8 |
Procedure Invocation Handle Format |
3-9 |
Invocation Context Block Format |
3-10 |
Argument Information Register (R25) Format |
3-11 |
Linkage Pair Block Format |
3-12 |
Bound Procedure Descriptor (PDSC) |
4-1 |
Procedure Frame |
4-2 |
Operation of the Register Stack |
4-3 |
Direct Procedure Calls |
4-4 |
Indirect Procedure Calls |
4-5 |
Parameter Passing in Registers and Memory |
4-6 |
Argument Information Register Representation |
4-7 |
Simple Function Descriptor |
4-8 |
Bound Function Descriptor |
5-1 |
Alpha Signature Information Block (PSIG) |
5-2 |
I64 Signature Information Block (PSIG) |
6-1 |
Varying Character String Data Type (DSC$K_DTYPE_VT)---General Format |
6-2 |
Varying Character String Data Type (DSC$K_DTYPE_VT) Format |
7-1 |
Descriptor Prototype Format |
7-2 |
Fixed-Length Descriptor Format |
7-3 |
Dynamic String Descriptor Format |
7-4 |
Array Descriptor Format |
7-5 |
Procedure Argument Descriptor Format |
7-6 |
Decimal String Descriptor Format |
7-7 |
Noncontiguous Array Descriptor Format |
7-8 |
Varying String Descriptor Format |
7-9 |
Varying String Descriptor with Character String Data Type |
7-10 |
Varying String Array Descriptor Format |
7-11 |
Unaligned Bit String Descriptor Format |
7-12 |
Unaligned Bit Array Descriptor Format |
7-13 |
String with Bounds Descriptor Format |
7-14 |
Unaligned Bit String with Bounds Descriptor Format |
8-1 |
Format of a Condition Value |
8-2 |
Interaction Between Handlers and Default Handlers |
8-3 |
Signal Argument Vector --- 32-Bit Format |
8-4 |
Signal Argument Vector --- 64-Bit Format |
8-5 |
VAX Mechanism Vector Format |
8-6 |
Alpha Mechanism Vector Format |
8-7 |
I64 Mechanism Vector Format |
A-1 |
Unwind Table and Unwind Information Block |
A-2 |
OpenVMS Operating System-Specific Data Area Segment |
A-3 |
Format of OSSD$T_SPILL_DATA |
Tables |
2-1 |
VAX Register Usage |
2-2 |
Argument-Passing Mechanisms with User Explicit Control |
3-1 |
Alpha Integer Register Usage |
3-2 |
Alpha Floating-Point Register Usage |
3-3 |
Contents of Stack Frame Procedure Descriptor (PDSC) |
3-4 |
Contents of Register Frame Procedure Descriptor (PDSC) |
3-5 |
Contents of Null Frame Procedure Descriptor (PDSC) |
3-6 |
Contents of the Invocation Context Block |
3-7 |
Contents of the Argument Information Register (R25) |
3-8 |
Contents of the Linkage Pair Block |
3-9 |
Contents of the Bound Procedure Descriptor (PDSC) |
3-10 |
Argument Item Locations |
3-11 |
Data Types and the Unused Bits in Passed Data |
3-12 |
Natural Alignment Requirements |
4-1 |
I64 General Register Usage |
4-2 |
I64 Floating-Point Register Usage |
4-3 |
I64 Predicate Register Usage |
4-4 |
I64 Branch Register Usage |
4-5 |
I64 Application Register Usage |
4-6 |
Full IEEE-Format Floating-Point Status Register |
4-7 |
VAX-Format Floating-Point Status Register |
4-8 |
Summary of Function Descriptor Kinds |
4-9 |
Rules for Allocating Parameter Slots |
4-10 |
Data Types and the Unused Bits in Passed Data |
4-11 |
Extension Type Codes |
4-12 |
Argument Information Register Codes |
4-13 |
Rules for Return Values |
4-14 |
Simple Function Descriptor |
4-15 |
Contents of Bound Function Descriptor |
4-16 |
Contents of the Invocation Context Block |
4-17 |
Flags in LIBICB$V_FRAME_FLAGS Field of the invocation context block |
4-18 |
Natural Alignment Requirements |
5-1 |
Signature Information Field Tag Values |
5-2 |
Contents of the Signature Information Block (PSIG) |
5-3 |
Register Argument Signature Encodings |
5-4 |
Function Return Signature Encodings |
5-5 |
Native-to-Translated Conversion of the PSIG Field Values |
5-6 |
Translated-to-Native Conversion of the PSIG Field Values |
6-1 |
Atomic Data Types |
6-2 |
String Data Types |
6-3 |
Miscellaneous Data Types |
6-4 |
Reserved Data Types |
7-1 |
Argument Descriptor Classes for OpenVMS Alpha and OpenVMS VAX |
7-2 |
Contents of the Prototype Descriptor |
7-3 |
Contents of the CLASS_S Descriptor |
7-4 |
Contents of the CLASS_D Descriptor |
7-5 |
Contents of the CLASS_A Descriptor |
7-6 |
Contents of the CLASS_P Descriptor |
7-7 |
Contents of the CLASS_SD Descriptor |
7-8 |
Internal-to-External BINSCALE Conversion Examples |
7-9 |
Contents of the CLASS_NCA Descriptor |
7-10 |
Contents of the CLASS_VS Descriptor |
7-11 |
Contents of the CLASS_VSA Descriptor |
7-12 |
Contents of the CLASS_UBS Descriptor |
7-13 |
Contents of the CLASS_UBA Descriptor |
7-14 |
Contents of the CLASS_SB Descriptor |
7-15 |
Contents of the CLASS_UBSB Descriptor |
7-16 |
Specific OpenVMS VAX Descriptors Reserved to Hewlett-Packard |
8-1 |
Contents of the Condition Value |
8-2 |
Value Symbols for the Condition Value Longword |
8-3 |
Interpretation of Severity Codes |
8-4 |
Exception Codes and Symbols for the GENTRAP Parameter |
8-5 |
Contents of the Alpha Argument Mechanism Array (MECH) |
8-6 |
Contents of the I64 Argument Mechanism Array (MECH) |
A-1 |
F (Flags) Field of the Information Block |
A-2 |
Region Header Records |
A-3 |
Prologue Descriptor Records for the Stack Frame |
A-4 |
Prologue Descriptor Records for the Return Pointer |
A-5 |
Prologue Descriptor Records for the Previous Function State |
A-6 |
Prologue Descriptor Records for Predicate Registers |
A-7 |
Prologue Descriptor Records for General, Floating-Point, and Branch Registers |
A-8 |
Prologue Descriptor Records for the User NaT Collection Register |
A-9 |
Prologue Descriptor Records for the Loop Counter Register |
A-10 |
Prologue Descriptor Records for the Primary UNaT Collection |
A-11 |
Prologue Descriptor Records for the Backing Store |
A-12 |
Body Region Descriptor Records |
A-13 |
General Unwind Descriptors |
A-14 |
Operating System-Specific Data Area |
A-15 |
OpenVMS OSSD Caller Spill Register Information |
A-16 |
Description of OSSD$T_SPILL_DATA Segment |
B-1 |
Record Formats |
B-2 |
Example ULEB128 Encodings |