Well, after a week of tearing my hair out, trying all sorts of SRM settings,
I've concluded that its some form arch bug with SRM, in that its not setting
pyxis to a known state before jumping to the pal. if you halt the cpu, the
chipset resets itself aparently. hopfully this will get addressed in SRM v5.7
Anyway, thanks to Dr. Tom Blinn and Dr. Udo Grabowski for their prompt replies
in this matter.
--
Alexander Hill-Beck
"In a just cause, there are no failures; there are only delayed successes."
- Isaac Asimov
Received on Fri Apr 07 2000 - 19:14:38 NZST