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HP OpenVMS Programming Concepts Manual
9.3 Exception Conditions
Exceptions can be generated by any of the following:
Hardware-generated exceptions always result in conditions that require
special action if program execution is to continue.
Software-generated exceptions may result in error or warning
conditions. These conditions and their message descriptions are
documented in the online Help Message utility and in the OpenVMS system messages documentation.
To access online message descriptions, use the HELP/MESSAGE command.
More information on using the Help Message utility is available in
OpenVMS System Messages: Companion Guide for Help Message Users. That document describes only those messages that occur
when the system is not fully operational and you cannot access Help
Message.
Some examples of exception conditions are as follows:
- Arithmetic exception condition in a user-written program detected
and signaled by hardware (for example, floating-point overflow)
- Error in a user argument to a run-time library routine detected by
software and signaled by calling LIB$STOP (for example, a negative
square root)
- Error in a run-time library language-support routine, such as an
I/O error or an error in a data-type conversion
- RMS success condition stating that the record is already locked
- RMS success condition stating that the created file superseded an
existing version
There are two standard methods for an HP- or user-written routine to
indicate that an exception condition has occurred:
- Return a completion code to the calling program using the function
value mechanism
Most general-purpose run-time library routines
indicate exception conditions by returning a condition value in R0 (R8
for I64). The calling program then tests bit 0 of R0 (R8 for I64) for
success or failure. This method allows better programming structure,
because the flow of control can be changed explicitly after the return
from each call. If the actual function value returned is greater than
32 bits, then use both R0 and R1 (R8, R9 for I64).
On Alpha
systems, if the actual function returned is a floating-point value, the
floating-point value is returned in F0, or F0 and F1.
On I64
systems, if the actual function returned is a floating-point value, the
floating-point value is returned in F8, F9.
- Signal the exception condition
A condition can be signaled by calling the RTL routine LIB$SIGNAL
or LIB$STOP. Any condition handlers that were enabled are then called
by the CHF. See Figure 9-5 for the order in which CHF invokes
condition handlers.
Exception conditions raised by hardware or
software are signaled to the routine identically.
For more details,
see Section 9.8 and Section 9.8.1.
9.3.1 Conditions Caused by Exceptions
Table 9-1 and Table 9-2 summarize common conditions caused by
exceptions. The condition names are listed in the first column. The
second column explains each condition more fully by giving information
about the type, meaning, and arguments relating to the condition. The
condition type is either trap or fault. For more information about
traps and faults, refer to the VAX Architecture Reference Manual, the Alpha Architecture Reference Manual, and
the Intel® Itanium® Architecture Software Developer's
Manual. The meaning of the exception condition is a short
description of each condition. The arguments for the condition handler
are listed where applicable; they give specific information about the
condition.
Table 9-1 Summary of Exception Conditions
| Condition Name |
Explanation |
|
|
SS$_ACCVIO
|
Type:
|
Fault.
|
|
|
Description
|
Acess Violation.
|
|
|
Arguments:
|
- Reason for access violation. This is a mask with the following
format:
Bit <0> = type of access violation
0 = page table entry protection code did not permit
intended access
1 = P0LR, P1LR, or SLR length violation
1
Bit <1> = page table entry reference
0 = specified virtual address not accessible
1 = associated page table entry not accessible
Bit <2> = intended access
0 = read
1 = modify
Bit <16> = indicates fault on the pre-fetch of the instruction
2
0 = successful execution
1 = fault on fetch
Bit <17> =indicates whether instruction is marked as no
execute
2
0 = not market
1 = indicates instruction is marked as a fault on execute in its
page table entry
- Virtual address to which access was attempted or, on some
processors, virtual address within the page to which access was
attempted.
|
|
SS$_ARTRES
2
|
Type:
Description:
Arguments:
|
Trap.
Reserved arithmetic trap.
None.
|
|
SS$_ASTFLT
|
Type:
|
Trap.
|
|
|
Description:
|
Stack invalid during attempt to deliver an AST.
|
|
|
Arguments:
|
- Stack pointer value when fault occurred.
- AST parameter of failed AST.
- Program counter (PC) at AST delivery interrupt.
- Processor status longword (PSL) for VAX or processor status (PS)
for Alpha at AST delivery interrupt.
3 For PS, it is the low-order 32 bits.
- Program counter (PC) to which AST would have been delivered.
3
- Processor status longword (PSL) for VAX or processor status (PS)
for Alpha to which AST would have been delivered.
3 For PS, it is the low-order 32 bits.
|
|
SS$_BREAK
|
Type:
Description:
Arguments:
|
Fault.
Breakpoint instruction encountered.
None.
|
|
SS$_CMODSUPR
|
Type:
Description:
Arguments:
|
Trap.
Change mode to supervisor instruction encountered.
4
Change mode code. The possible values are --32,768 through 32,767.
|
|
SS$_CMODUSER
|
Type:
Description:
Arguments:
|
Trap.
Change mode to user instruction encountered.
4
Change mode code. The possible values are --32,768 through 32,767.
|
|
SS$_COMPAT
1
|
Type:
|
Fault.
|
|
|
Description:
|
Compatibility-mode exception. This exception condition can occur only
when executing in compatibility mode.
5
|
|
|
Arguments:
|
Type of compatibility exception. The possible values are as follows:
0 = Reserved instruction execution
1 = BPT instruction executed
2 = IOT instruction executed
3 = EMT instruction executed
4 = TRAP instruction executed
5 = Illegal instruction executed
6 = Odd address fault
7 = TBIT trap.
|
|
SS$_DECOVF
1
2
|
Type:
Description:
Arguments:
|
Trap.
Decimal overflow.
None.
|
|
SS$_FLTDIV
1
2
6
|
Type:
Description:
Arguments:
|
Trap.
Floating/decimal divide-by-zero.
None.
|
|
SS$_FLTDIV_F
1
|
Type:
Description:
Arguments:
|
Fault.
Floating divide-by-zero.
None.
|
|
SS$_FLTINE
6
|
Type:
Description:
Arguments:
|
Trap.
Floating inexact result.
None.
|
|
SS$_FLTINE_F
|
Type:
Description:
Arguments:
|
Trap.
Floating inexact result fault.
None.
|
|
SS$_FLTINV
6
|
Type:
Description:
Arguments:
|
Trap.
Floating invalid operation.
None.
|
|
SS$_FLTINV_F
|
Type:
Description:
Arguments:
|
Trap.
Floating invalid operation fault.
None.
|
|
SS$_FLTOVF
1
2
6
|
Type:
Description:
Arguments:
|
Trap.
Floating-point overflow.
None.
|
|
SS$_FLTOVF_F
1
|
Type:
Description:
Arguments:
|
Fault.
Floating-point overflow fault.
None.
|
|
SS$_FLTUND
1
2
6
|
Type:
Description:
Arguments:
|
Trap.
Floating-point underflow.
None.
|
|
SS$_FLTUND_F
1
|
Type:
Description:
Arguments:
|
Fault.
Floating-point underflow fault.
None.
|
|
SS$_INTDIV
1
2
|
Type:
Description:
Arguments:
|
Trap.
Integer divide-by-zero.
None.
|
|
SS$_INTOVF
1
2
|
Type:
Description:
Arguments:
|
Trap.
Integer overflow.
None.
|
|
SS$_OPCCUS
1
|
Type:
Description:
Arguments:
|
Fault.
Opcode reserved for customer fault.
None.
|
|
SS$_OPCDEC
|
Type:
Description:
Arguments:
|
Fault.
Opcode reserved for HP fault.
None.
|
|
SS$_PAGRDERR
|
Type:
|
Fault.
|
|
|
Description:
|
Read error occurred during an attempt to read a faulted page from disk.
|
|
|
Arguments:
|
- Translation not valid reason. This is a mask with the following
format:
Bit <0> = 0
Bit <1> = page table entry reference
0 = specified virtual address not valid
1 = associated page table entry not valid
Bit <2> = intended access
0 = read
1 = modify
- Virtual address of referenced page.
|
|
SS$_RADRMOD
1
|
Type:
Description:
Arguments:
|
Fault.
Attempt to use a reserved addressing mode.
None.
|
|
SS$_ROPRAND
|
Type:
Description:
Arguments:
|
Fault.
Attempt to use a reserved operand.
None.
|
|
SS$_SSFAIL
|
Type:
Description:
Arguments:
|
Fault.
System service failure (when system service failure exception mode
is enabled). Conditon occured as result of the use of the obsolete
feature that was enabled by using $SETSFM service.
Status return from system service (R0). (The same value is in R0 of
the mechanism array.)
|
|
SS$_SUBRNG
1
2
|
Type:
Description:
Arguments:
|
Trap.
Subscript range trap.
None.
|
|
SS$_TBIT
1
|
Type:
Description:
Arguments:
|
Fault.
Trace bit is pending following an instruction.
None.
|
1On VAX systems, this condition is generated by hardware.
2On Alpha systems, this condition is generated by software.
3The PC and PSL (or PS) normally included in the signal
array are not included in this argument list. The stack pointer of the
access mode receiving this exception is reset to its initial value.
4If a change mode handler has been declared for user or
supervisor mode with the Declare Change Mode or Compatibility Mode
Handler (SYS$DCLCMH) system service, that routine receives control when
the associated trap occurs.
5If a compatibility-mode handler has been declared with the
Declare Change Mode or Compatibility Mode Handler (SYS$DCLCMH) system
service, that routine receives control when this fault occurs.
6On I64 systems, this condition is generated by hardware.
Table 9-2 I64-Specific Exception Conditions
| Condition Name |
Explanation |
|
|
SS$_NATFAULT
|
Type:
|
Fault
|
|
|
Description
|
Register NaT consumption fault - A non-speculative operation, (load,
store, control register access, instruction fetch, and so forth), read
a NaT source register, NaTVal source register, or referenced a NaTPage.
|
|
|
Arguments:
|
Reason mask:
Bit <0> Execute exception - interruption is
associated with an instruction fetch
Bit <2> Write exception - interruption is associated with a
write operation.
Bit <19> Register Stack - interruption is associated with a
mandatory RSE fill or spill.
|
|
SS$_FLTDENORMAL
|
Type:
|
Fault
|
|
|
Description
|
Normal/unnormal operand exception
|
|
|
Arguments:
|
|
|
SS$_BREAK_SYS
|
Type:
|
Fault
|
|
|
Description
|
An attempt was made to execute an Itanium break instruction.
|
|
|
Arguments:
|
Break code is implementation specific. See Vol.2 of the
Intel® Itanium® Architecture Software Developer's
Manual.
|
|
SS$_BREAK_ARCH
|
Type:
|
Fault
|
|
|
Description
|
An attempt was made to execute an Itanium break instruction.
|
|
|
Arguments:
|
Break code is one of SS$_ROPRAND, SS$_INTDIV, SS$_INTOVF, SS$_SUBRNG,
SS$_NULPTRERR, SS$_DECOVF, SS$_DECDIV, SS$_DECINV, or SS$_STKOVF
|
|
SS$_BREAK_APPL
|
Type:
|
Fault
|
|
|
Description
|
An attempt was made to execute an Itanium break instruction.
|
|
|
Arguments:
|
Break code is one of SS$_ROPRAND, SS$_INTDIV, SS$_INTOVF, SS$_SUBRNG,
SS$_NULPTRERR, SS$_DECOVF, SS$_DECDIV, SS$_DECINV, or SS$_STKOVF
|
|
SS$_DEBUG_FAULT
|
Type:
|
Fault
|
|
|
Description
|
Debug fault - Either the instruction address matches the parameters set
up in the instruction debug registers, or the data address of a load,
store, semaphore, or mandatory RSE fill or spill matches the parameters
set up in the data debug registers.
|
|
|
Arguments:
|
- Reason mask =
Bit <0> Execute exception - interruption is
associated with an instruction fetch
Bit <2> Write exception - interruption is associated with a
write operation.
Bit <19> Register Stack - interruption is associated with a
mandatory RSE fill or spill.
- Va = The address of the data being referenced.
|
Change-Mode and Compatibility-Mode Handlers
Two types of hardware exception can be handled in a way different from
the normal condition-handling mechanism described in this chapter. The
two types of hardware exception are as follows:
- Traps caused by change-mode-to-user or change-mode-to-supervisor
instructions
- On VAX systems, compatibility mode faults
You can use the Declare Change Mode or Compatibility Mode Handler
(SYS$DCLCMH) system service to establish procedures to receive control
when one of these conditions occurs. The SYS$DCLCMH system service is
described in the HP OpenVMS System Services Reference Manual.
9.3.2 Exception Conditions
On Alpha systems, the condition values that your condition-handling
routine expects to receive on VAX systems may no longer be meaningful,
even though the format of the 32-bit condition value and its location
in the signal array are the same as they are on VAX systems. Because of
architectural differences, some exception conditions that are returned
on VAX systems are not supported on Alpha systems. In addition, some
Alpha exception conditions exist on I64 and some do not, and there are
some new I64-specific exception conditions.
On Alpha systems, because hardware exceptions are more architecture
specific than software exceptions, only a subset of the hardware
exceptions supported on VAX systems are also supported on Alpha
systems. In addition, the Alpha architecture defines several additional
exceptions that are not supported on VAX systems. Some Alpha hardware
exceptions exist on I64 and some do not, and there are some new
I64-specific hardware exceptions.
Table 9-3 lists the Alpha exceptions that are not supported on VAX
systems and VAX hardware exceptions that are not supported on Alpha
systems. For some arithmetic exceptions, Alpha software produces VAX
compatible exceptions that are not supported by the hardware itself.
See Section 9.3.3 for a discussion of SS$_HPARITH, a generic Alpha
exception condition that software may replace with specific VAX
exceptions.
Note
SS$_HPARITH is not used on I64 instead; VAX arithmetic conditions are
used. There are also I64-specific exceptions: SS$_NATFAULT,
SS$_DEBUG_FAULT, SS$_BREAK_SYS, SS$_BREAK_ARCH, SS$_BREAK_APPL, and
SS$_FLTDENORMAL.
|
Table 9-3 Architecture-Specific Hardware Exceptions
| Exception Condition Code |
Comment |
| New Alpha Exceptions |
|
SS$_HPARITH--High-performance arithmetic exception
|
Generated for most Alpha arithmetic exceptions (see Section 9.3.3)
|
|
SS$_ALIGN--Data alignment trap
|
No VAX equivalent
|
| VAX-Specific Hardware Exceptions |
|
SS$_ARTRES--Reserved arithmetic trap
|
No Alpha system equivalent
|
|
SS$_COMPAT--Compatibility fault
|
No Alpha system equivalent
|
|
SS$_DECOVF--Decimal overflow
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_FLTDIV--Float divide-by-zero (trap)
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_FLTDIV_F--Float divide-by-zero (fault)
2
|
Replaced by SS$_HPARITH on Alpha (see Section 9.3.3)
|
|
SS$_FLTOVF--Float overflow (trap)
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_FLTOVF_F--Float overflow (fault)
2
|
Replaced by SS$_HPARITH on Alpha (see Section 9.3.3)
|
|
SS$_FLTUND--Float underflow (trap)
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_FLTUND_F--Float underflow (fault)
2
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_INTDIV--Integer divide-by-zero
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_INTOVF--Integer overflow
1
|
Replaced by SS$_HPARITH on Alpha
(see Section 9.3.3)
|
|
SS$_TBIT--Trace pending
2
|
No Alpha equivalent
|
|
SS$_OPCCUS--Opcode reserved to customer
|
No Alpha equivalent
|
|
SS$_RADMOD--Reserved addressing mode
|
No Alpha equivalent
|
|
SS$_SUBRNG--INDEX subscript range check
|
No Alpha equivalent
|
1On Alpha systems, this condition may be generated by
software.
2On I64 systems, this condition may be generated by software.
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